1. Field of the Invention
The present invention relates in general to electronic devices, and more specifically to a cascadable level shifter cell with improved noise immunity.
2. Description of the Related Art
There exists the need for high-speed, point-to-point interface communications between lower chip level signals, e.g., 1 Volt (V) or less, and external circuits operating at higher voltage levels (e.g, 2.5V, 3.3V, or higher). Many systems include circuitry designed with a variety of technologies operating at multiple voltage levels. It has proved to be very challenging, however, to provide level shifting and output buffer circuits that interface multiple voltage levels while operating at the desired limits of the I/O speed. Process technologies, including CMOS processes, are continually improving resulting in smaller and faster devices, such as, for example, 90-nm CMOS. The smaller devices made with the newer technologies have relatively thin gate-oxide layers, which are faster than devices having relatively thick gate-oxide layers, but which are unable to withstand the higher voltage levels. Input/Output (I/O) architectures rely on devices having thicker gate-oxide layers to implement output drivers for safe operation. The larger devices, however, are slower and tend to slow down the I/O interface.
It is appreciated that the terms “thin” and “thick” are relative and that the actual thicknesses depend on the particular process technology and voltage levels employed. As used herein, the term “thin-gate” refers to thin gate-oxide devices that are suitable for the lower voltage ranges but that would break down if exposed to higher voltage levels. The term “thick-gate” refers to thick gate-oxide devices that are capable of being exposed to the higher voltage ranges. In the more specific embodiments illustrated herein, the lower voltage range is up to 1.2 V whereas the higher or full voltage range is between ground (0 V) and 3.3-3.6 V. It is understood, however, that the particular voltage levels and values are arbitrary and may change over time, such that what is now called “thin” may be considered “thick” by tomorrow's standards. The present invention transcends the particular voltage levels and ranges in that the configuration allows the lower voltage or thin-gate devices to be used in a buffer that switches higher voltage levels which would otherwise require higher voltage devices.
A conventional approach is to construct output buffers with a combination of thin-gate and thick-gate devices in an attempt to achieve a desired level of performance while isolating the thin-gate devices from the larger external supply voltages. Such drivers suffer from low performance, however, particularly at lower voltage levels of the chip. A simple conventional level shifter is implemented by linking two buffers or inverters together, a first coupled between a first voltage range and having an output coupled to the input of a second, which is coupled between a second and somewhat higher voltage range. Such conventional configuration is susceptible to noise in that any variation in switching voltage at the output of the first caused by noise or the like potentially results in failure to switch the second.
It is desired to implement level shifters and output buffers capable of operating between lower level chip voltages and higher voltage peripheral components and circuits that are less susceptible to noise.